In a typical flip chip (FC) package, a semiconductor chip is “flipped” over such that its external electrical pads face downward toward the circuit board onto which the semiconductor chip is to be connected. The typical flip chip package includes one or more interposers within the package to re-route the pads to a larger ball grid array (BGA) compatible with the larger electrical connector pitch of the circuit board. In a basic flip chip design, a single printed circuit board (PCB) interposer is used. The interposer is a PCB interposer, because the PCB materials closely match the coefficient of thermal expansion (CTE) of the circuit board onto which the flip chip is ultimately to be mounted.
As the demand for greater capabilities and features of semiconductor chips increases, so does the need for additional input/output connections (pads) to and from the semiconductor chips. There are two main known ways to deal with this. First, the semiconductor chip may be made larger to accommodate the additional pads. However, this typically results in increased manufacturing costs and undesirable increased circuit board real estate utilization. Alternatively, the semiconductor chip pad pitch may be decreased (made tighter). However, because PCB interposers are not able to handle very small interconnect pitches, flip chip packages have more recently incorporated an additional silicon or glass interposer in a “2.5D” configuration to re-map the semiconductor chip pad pitch to an intermediary pitch more suitable for the PCB interposer. Silicon and glass are used in particular, because these materials can handle very small pitches, and also because the CTEs of silicon and glass are close to the CTE of the semiconductor chip, thus allowing the connections between the semiconductor chip and the silicon or glass interposer to be very thin and reliable.
Unfortunately, silicon and glass interposers are expensive and time-consuming to manufacture, and the entire flip chip package has become significantly more complex to assemble. Moreover, by using both the silicon (or glass) interposer and the PCB interposer, three first-level interconnects and interconnections are needed. These added structural complexities may potentially result in greater manufacturing yield loss. This, combined with the greater expense, will likely make such a structure less worthwhile to build as semiconductor pad pitches continue to decrease.